Uni-Logo

Institut für Informatik
 

Technical Report No. 95, July 1996 - Abstract


Hengster, Harry; Becker, Bernd:
Synthesis of Fully Testable High Speed Circuits Derived from Decision Diagrams

We present an approach to synthesize fully stuck-at fault testable circuits along with complete test sets. Starting from functional descriptions given by Kronecker Functional Decision Diagrams (KFDDs) circuits with inherently small delay are constructed by a composition method based on Boolean Matrix Multiplication. During the construction efficient algorithms working on the KFDD are used to avoid the creation of constant lines. Furthermore, in each composition step tests for the faults at the newly generated lines are computed on the fly. Experimental results are given to underline the efficiency of the methods.


Report No.95 (PostScript)